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Avoid the board edge by CopperEdgeCLearance amount

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Arjan Mels
2022-06-25 22:28:40 +02:00
parent 1b5c7acf87
commit e53ef69148
1 changed files with 8 additions and 0 deletions
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8
ViaStitching/FillArea.py
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@ -429,6 +429,12 @@ STEP = '-'
# KeepOuts are filtered because they have no name # KeepOuts are filtered because they have no name
target_areas = filter(lambda x: (x.GetNetname() == self.netname), all_areas) target_areas = filter(lambda x: (x.GetNetname() == self.netname), all_areas)
# Get the board outline and size with
board_edge = SHAPE_POLY_SET()
self.pcb.GetBoardPolygonOutlines(board_edge)
b_clearance = max(self.pcb.GetDesignSettings().m_CopperEdgeClearance, self.clearance) + self.size
board_edge.Deflate(int(b_clearance), int(12), SHAPE_POLY_SET.ROUND_ALL_CORNERS)
via_list = [] # Create a list of existing vias => faster than scanning through the whole rectangle via_list = [] # Create a list of existing vias => faster than scanning through the whole rectangle
max_target_area_clearance = 0 max_target_area_clearance = 0
@ -470,6 +476,8 @@ STEP = '-'
# test_result only remains true if the via is inside an area and not on an edge # test_result only remains true if the via is inside an area and not on an edge
test_result = (hit_test_area and not hit_test_edge) test_result = (hit_test_area and not hit_test_edge)
test_result = (test_result and board_edge.Collide(VECTOR2I(point_to_test))) # check if inside board outline
if test_result: if test_result:
# Create a via object with information about the via and place it in the rectangle # Create a via object with information about the via and place it in the rectangle
via_obj = ViaObject(x=x, y=y, pos_x=current_x, pos_y=current_y) via_obj = ViaObject(x=x, y=y, pos_x=current_x, pos_y=current_y)