fixing annular on vias for kv6

This commit is contained in:
U-CAD\userC
2021-07-26 16:25:02 +02:00
parent 25cfd8326a
commit 2842432641

View File

@ -15,7 +15,7 @@
global mm_ius, DRL_EXTRA, AR_SET, AR_SET_V, DRL_EXTRA_ius, MIN_AR_SIZE, MIN_AR_SIZE_V, found_violations, LogMsg, ___version___
___version___="1.7.0"
___version___="1.7.1"
#wx.LogMessage("My message")
mm_ius = 1000000.0
@ -332,10 +332,15 @@ def calculate_AR():
for item in board.GetTracks():
if hasattr(pcbnew,'VIA'):
via = pcbnew.VIA
testing = type(item)
else:
via = pcbnew.HOLE_ATTRIBUTE_HOLE_VIA_THROUGH #PCB_VIA_T
via = pcbnew.PCB_VIA #'PCB_VIA'
item = pcbnew.Cast_to_PCB_VIA(item)
testing = type(item) #item.GetClass()
if type(item) is via:
#writeTxt(str(testing))
if testing is via: # or via in testing:
#writeTxt(str(testing)+"here")
pos = item.GetPosition()
drill = item.GetDrillValue()
width = item.GetWidth()